The technology disclosed in this specification relates to methods for fabricating a semiconductor device including an interconnect made of, for example, copper (Cu), and a diffusion barrier film provided on the interconnect to prevent the diffusion of metal.
As large scale semiconductor integrated circuits (LSI) are miniaturized, it is required to further increase the speed, reduce the power consumption, and ensure high reliability of semiconductor elements. For this reason, a method in which Cu, which has resistance lower than aluminum (Al), is used as an interconnect material to reduce interconnect resistance, a method in which a low dielectric constant insulating film generally referred to as a Low-k film is used as an insulating film between interconnects (hereinafter referred to as an interlayer insulating film) to reduce the capacitance between the interconnects and interlayer capacitance, or a method in which a diffusion barrier film is provided to prevent the diffusion of Cu to ensure high reliability is being considered.
To form a Cu interconnect, a method referred to as a damascene method is generally used. In this method, a recessed section is first formed in an interlayer insulating film made of a Low-k material formed on a substrate, and then a barrier metal film is formed on an inner surface of the recessed section, and on an upper surface of the interlayer insulating film. Next, the recessed section is filled with copper plating, and then excess copper and part of the barrier metal film which is on the upper surface of the interlayer insulating film are removed by chemical-mechanical polishing (CMP), thereby forming the Cu interconnect embedded in the recessed section. Next, a diffusion barrier film is formed on the interlayer insulating film, and on the Cu interconnect.
Japanese Patent Publication H11-307474 discloses the technique of using a SiN film as the above-described diffusion barrier film to reduce the diffusion of Cu into an interlayer insulating film made of a Low-k material.